GPIO De-bounce Cycle Control Register(GPIO_DBNCECON)

Defines for the bit fields in the GPIO_DBNCECON register. More...

Collaboration diagram for GPIO De-bounce Cycle Control Register(GPIO_DBNCECON):

Defines
#define	GPIO_DBNCECON_ICLK_ON
	Interrupt clock On mode.
#define	GPIO_DBNCECON_DBCLKSRC
	De-bounce counter clock source select.
#define	GPIO_DBNCECON_DBCLKSEL_M
	De-bounce sampling cycle selection mask.
#define	GPIO_DBNCECON_DBCLKSEL_S
	De-bounce sampling cycle selection shift.

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Detailed Description

Defines for the bit fields in the GPIO_DBNCECON register.

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Define Documentation

#define GPIO_DBNCECON_ICLK_ON

Interrupt clock On mode.

Definition at line 799 of file xhw_gpio.h.

#define GPIO_DBNCECON_DBCLKSRC

De-bounce counter clock source select.

Definition at line 804 of file xhw_gpio.h.

Referenced by GPIODebounceTimeSet().

#define GPIO_DBNCECON_DBCLKSEL_M

De-bounce sampling cycle selection mask.

Definition at line 809 of file xhw_gpio.h.

Referenced by GPIODebounceTimeGet(), and GPIODebounceTimeSet().

#define GPIO_DBNCECON_DBCLKSEL_S

De-bounce sampling cycle selection shift.

Definition at line 815 of file xhw_gpio.h.